1. Field of Invention
The present invention relates to a semiconductor device with a memory having multiple ports built therein.
2. Description of Related Art
A memory device, referred to as a 2-port RAM or a dual port RAM, is known. This type of RAM is capable of writing data in a certain memory cell through one port, and reading data from another memory cell through another port at the same time. This type of RAM requires two word lines and two pairs of bit lines for one memory cell.
In recent years, processes have been developed for manufacturing even more miniaturized semiconductor devices, and memory devices with greater memory capacity have been developed.
When a memory device having many memory cells is manufactured using the miniaturization process, and data reading and writing are performed, in some instances, it has been confirmed that read data are different from data written. It has been determined that these incidents result from the fact that bit signals read out through bit line pairs are erroneously detected.
Accordingly, it is an object of the present invention to provide a semiconductor device in which data read out from memory cells are not erroneously detected.
It is another object of the present invention to provide a semiconductor device that can reduce capacitor coupling between data read lines and data write lines.
It is still another object of the present invention to provide a semiconductor device that can prevent interference between data read lines and data write lines.
It is a further object of the present invention to provide a semiconductor device that can prevent interference between bit lines.
A semiconductor device in accordance with the present invention includes:
a plurality of memory cells arranged in a column direction;
a plurality of word lines arranged along a row direction, and capable of asynchronously selecting any two of the plurality of memory cells;
a first data line extending along the column direction and commonly used by the plurality of memory cells, which is to be connected to a selected one of the memory cells;
a second data line extending along the column direction and commonly used by the plurality of memory cells, which is to be connected to another selected one of the memory cells, the first data line and the second data line being formed in different layers; and
an interlayer dielectric film being interposed between the first and second data lines.